Gallium nitride (GaN) semiconductor devices are increasingly desirable for power semiconductor devices because of their ability to carry large current and support high voltages. Development of these devices has generally been aimed at high power/high frequency applications. Devices fabricated for these types of applications are based on general device structures that exhibit high electron mobility and are referred to variously as heterojunction field effect transistors (HFET), high electron mobility transistors (HEMT), or modulation doped field effect transistors (MODFET). These types of devices can typically withstand high voltages, e.g., 100 Volts, while operating at high frequencies, e.g., 100 kHz-10 GHz.
A GaN HEMT device includes a nitride semiconductor with at least two nitride layers. Different materials formed on the semiconductor or on a buffer layer causes the layers to have different band gaps. The different material in the adjacent nitride layers also causes polarization, which contributes to a conductive two dimensional electron gas (2DEG) region near the junction of the two layers, specifically in the layer with the narrower band gap.
The nitride layers that cause polarization typically include a barrier layer of AlGaN adjacent to a layer of GaN to include the 2DEG, which allows charge to flow through the device. This barrier layer may be doped or undoped. Because the 2DEG region exists under the gate at zero gate bias, most nitride devices are normally on, or depletion mode devices. If the 2DEG region is depleted, i.e. removed, below the gate at zero applied gate bias, the device can be an enhancement mode device. Enhancement mode devices are normally off and are desirable because of the added safety they provide and because they are easier to control with simple, low cost drive circuits. An enhancement mode device requires a positive bias applied at the gate in order to conduct current.
FIG. 1 illustrates a conventional enhancement mode GaN transistor device 100 without a diffusion barrier. Device 100 includes substrate 101 that can be composed of silicon (Si), silicon carbide (SiC), sapphire, or other material, transition layers 102 typically composed of AlN and AlGaN that is about 0.1 to about 1.0 μm in thickness, buffer material 103 typically composed of GaN that is about 0.5 to about 10 μm in thickness, barrier material 104 typically composed of AlGaN where the Al to Ga ratio is about 0.1 to about 0.5 with thickness from about 0.005 to about 0.03 μm, p-type AlGaN 105, heavily doped p-type GaN 106, isolation region 107, passivation region 108, ohmic contact metals 109 and 110 for the source and drain, typically composed of Ti and Al with a capping metal such as Ni and Au, and gate metal 111 typically composed of a nickel (Ni) and gold (Au) metal contact over a p-type GaN gate.
There are several disadvantages of the conventional enhancement mode GaN transistors shown in FIG. 1. During growth of the p-type AlGaN 105 (in FIG. 1, for example) over the undoped GaN 103 or AlGaN 104, Mg atoms will diffuse back down the crystal into the active region of the device, leading to unintentional doping of layers 104 and 103. These Mg atoms act as acceptors, taking electrons, and become negatively charged. The negatively charged Mg repels electrons from the 2-dimensional electron gas. This leads to higher threshold voltage under the gate and lower conductivity in the region between the gate and the ohmic contacts. In addition, the charging and discharging of these Mg atoms can lead to time dependent changes in the threshold and conductivity of the device. A second disadvantage of the conventional GaN transistor is the high gate leakage when the transistor is turned on by applying positive voltage to the gate contact. During growth of layer 106 (in FIG. 1, for example), Mg atoms diffuse to the growth surface. When growth is terminated, a heavily doped layer exists at the surface. When positive bias is applied to the gate contact, a large current is generated due to the high doping at the top of this layer.
It would therefore be desirable to provide a GaN transistor with a diffusion suppression structure which avoids the above-mentioned disadvantages of the prior art.